Built-In-Self-Repair (BISR) techniques are increasingly being used to test and repair the memory arrays of Intelligent Random Access Memories (IRAM), Dynamic Random Access Memories (DRAM), and the like. BISR utilizes on-chip circuitry for automatically testing the memory array, and optionally performing a soft-repair of failed elements (rows, columns, I/Os, etc.) of the memory array discovered during test.
BISR stores the repair solution (i.e., the addresses of defective elements and the addresses of redundant elements of the memory array to which the defective elements have been remapped) in soft latches at least during the initial check of the memory. Once the initial check is complete, the user may scan out the information from these soft latches for blowing the fuses of defective row or column elements of the array, or, optionally, for programming the chip so that these elements are not accessed. This initial check does not destroy the repair solution because by design, the same solution is fed back from the output. If a soft BISR methodology is utilized (e.g., BISR is run in the field and the repair solution is evaluated at each power-up of the memory), the repair solution is not scanned. Instead, a soft-repair of failed elements of the memory array is performed, if possible. However, in both the cases, during the production test flow, BISR is run under various conditions (e.g., under various temperature and voltages) to assure good repair solution in all conditions.
Many types of testing are performed in the production test flow of a memory. One such test is chip-level scan (SCAN). The SCAN test is also generally slow to run, and is thus somewhat expensive. As a result, this test is normally placed somewhere in the middle of the test flow so that the overall production test flow is optimized. Further, during the SCAN test, soft latches used by the BISR are connected in the scan-chain causing the repair solution stored in the soft latches to be lost. Consequently, a custom test flow is generally used for memory designs employing BISR, wherein the SCAN test is done either at the start of the test flow or after the BISR SCAN of the test flow is complete, after which values stored in soft latches are no longer needed. However, if a custom test flow is used, the user must maintain two test flows, one for normal designs which do not use BISR, and one for designs which use BISR resulting in increased cost for testing. Moreover, since the custom test flow is not optimized, additional cost is incurred due to inefficiency in the test flow, even though the designs employ BISR.